SHHHH he might charge 22k for one in a box
Hi All,
10M clocksJust a few words WRT Esoteric and other 10M / Rubidium clocks.
Firstly the Esoteric is by all accounts based on a Stanford Research Rubidium core with a lot of other stuff thrown in.
There are others such as Antelope Audio 10M and Stanford Research make their own 10M clock with very low jitter.
Here's the problem - DAC's (the convertor chip itself) don't require a 10M clock frequency. 10MHz is all but useless to
a DAC running at 44.1k / 48k or any higher multiple such as 96k etc.
The DAC will require a mclk or bclk that is a multiple of 44.1kHz which will be anywhere from 2.8224MHz to
22.5792 MHz. In the case of CD94 type transports it is 256 x FS = 11.2896MHz. Bingo - Zenclock freq.
Any audio DAC or transport that has a 10MHz IP will somehow have to either slave to it via a PLL or convert it via DDS (direct digital synthesis).
As such the jitter induced by that further process will be far greater than the 10MHz clock itself. So it's basically not a smart idea.
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Latest Zenclock and reclockerLet's get back to 11.2896MHz and the CD94 type transport.
If we look at Steve's custom 11.2896 clock, this will then feed the SAA7210 decoder chip which then creates the 3 x I2S signals (data/bck/wck)
and we send those directly to the 1541 DAC.
As such the pure clock signal is corrupted by the SAA7210 itself. This is easy to see on even a 100MHz cro. The clock outputs a nice clean
square wave but the I2S signals coming from 7210 chip are full of rubbish, noise and jitter.
Many people try to alleviate this by upgrading various caps, power supplies etc etc on the transport and it certainly improves things to some degree
however there is no getting around this issue of the 7210 chip messing with the clock - regardless of how many esoteric parts you put in the transport.
I decided to address this by using a reclocking board after the 7210 chip that cleans and re aligns all 3 I2S signals to the low jitter master clock.
So all the damage that the 7210 chip does to the pristine clock signal is, to a very large extent reversed. The re clocking board uses a separate
chip for each of the I2S signals and they even each have a separate power supply so there is minimal interaction of the 3 signals.
All of the PS bypass caps are special high speed film caps that or not microphonic like ceramic caps. The whole board is on a solid copper board that is
right next to the Zenclock so there is absolutely minimal noise and corruption of the signals. The three re clocking chips are super fast, low jitter chips
that have very good drive capability to get the signals to DAC.
Further to this I have experimented with types of resistors and I2S signal levels. The standard 5V OP levels of the 7210 are not optimal for the
TDA1541 and this is pretty widely know these days.
To my ear this re clocking board made as much or even more difference than the clock itself.
Here's a pic of the latest Zenclock install just about finished for Rob. The reclocker board is just left of purple oscon and mounted right on the Zenclock
board itself. It's also right next to the I2S OP connector. Long runs of cat5 and esoteric parts look great but this tight, copper planed layout works
better WRT keeping those precious I2S signals clean.
cheers all,
Terry